coreboot is an extended firmware platform that delivers a lightning fast and secure boot experience on modern computers and embedded systems. The fact that BIOS or Intel firmware touches many restricted register settings which are not exposed to the external world is one of the major challenges for coreboot and that is being addressed by FSP (firmware support package) like binary blob solutions.
Any coreboot project can be split into three parts
• SoC – This section contains all components/IP initialization code.
• Mainboard – OxM boards, build based on underlying SoC support.
• FSP – Intel Firmware Support package to abstract all restricted soc registers from open source world and kept inside a binary blob.
This paper will explain how the open source community can use FSP 2.0 to create their mainboard based ports based on a supported SoC.